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How to use VVDI Prog to read D70F3624 from PSA Airbag

Description

Trying to use Xhorse VVDI Prog software v4.5.0 to read D70F3624 from PSA Airbag, but it is not working. Here are some helpful tips on working it out.

 

It shows the code as follows:

Select <D-FLASH>

Check Device…

12V Power Adapter connected

Initialization device…

Initialization success!

Initialization chip…

Try Frequency 04000000

Try Frequency failed

vvdi-prog-read-psa-aibag-d70f3624

Then i tried with and without external +12V supply.
Also tried manual frequency 8MHz and 4MHz. (I saw it was tested automatically but tried anyway.)
Tried with and without FLMD1 connected. (Not used by other programmers)
Also lifted 2 pins that you can see on pictures that were connected to RXD and TXD lines.
Using MCU Reflash Cable V2 (verified connections inside, yellow wire on correct location, also did continuity test on the other wires)
I tested myself the test points where I’m soldering against the MCU pins.

vvdi_cable_mcu_front

vvdi_connections

vvdi_rxd_txd

Some technical stuff:
VCC is set to 4.5V as default and measured 4.55V on pcb.
FLMD1 always at 0V.
FLMD0 pulled up to 3.5V.
RESET when goes up reaches 4.5V.
TXD when goes up reaches 3.9V, RXD 3.3V, bit timing of both RXD and TXD at any frequency set is always 104us (9600 baudrate).
Oscillator on board is 8MHz.
There are messages on both RXD and TXD.
Having asked the experienced Samic, for help. They said the connection to chip is ok, should be software bug.
And they thought currently the point is communication with chip. And i was advised to try to read the chip ID with other programmers

 

also require you to grab the signal of RXD and TXD line about 500ms.will find the caused reason and solve it.

 

So i used another programmer that reads it fine.

Device id:
10 7F 04 61 7F 7F 7F 8F 80 80 80 80 02 7F 7F 01 02 C4 37 B0 46 B3 B3 37 31 20 20 7F FF 00 00 00

VVDI-Prog doesn’t even reach that part, it stops after the first reply of the mcu.

I recorded my other programmer reading it with Saleae Logic (v1.25), attached session and dump.

 

f3624 read logged.rar (502.2 KB)

620595200_9805630180_upd70f3624_dflash_crash.rar (2.4 KB)

 

 

Samic helped to checked dump, saying this programmer use the default low baudrate 9600bps to read data.
VVDI PROG changed baudrate to 153600bps to decrease read time

 

baudrate change steps:
1.Use low baudrate 9600 wakeup the chip, if get the correct response,go to step2
2.Start change baudrate, due to the d70f3624 doesn’t know own osc frequency,programmer need send it the accurate value
(VVDI-PROG put some common-used osc value,so you can see try frequency xxxxhz info)
3.Programmer send the new baudrate value to d70f3624, vvdi prog use 153600bps
the d70f3624 can calculate the new baudrate with the osc value, but if the osc value is incorrect,you will get a wrong baudrate
(eg: the actual osc is 4Mhz, if you set a 8Mhz osc value and change the baudrate to 153600bps the chip will set a 76800bps)
4.Use the new baudrate to communicate

Maybe the osc frequency is not in VVDI PROG osc value list
Please grab a new dump with vvdiprog,need to further analyze of the problem.

 

 

(BIG THANKS to all share the info above in digital-kaos.co.uk forum, especially Mr. Samic))

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